Altera HardCopy II Clock Uncertainty Calculator User Manual

Page 26

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2–12

Altera

Corporation

HardCopy II Clock Uncertainty Calculator User Guide

Running the Clock Uncertainty Calculator Flow

4.

Create the clock uncertainty constraint on a SDC.

For example,

set_clock_uncertainty –from

altpll0:PLL0|altpll"altpll_component|_clk0 \
-to altpll0:PLL0|altpll"altpll_component|_clk1 \-setup 0.100
set_clock_uncertainty –from
altpll0:PLL0|altpll"altpll_component|_clk0 \

-to

altpll0:PLL0|altpll"altpll_component|_clk1 \

-hold 0.050.

Figure 2–12. Clock Transfer Report and Clock Uncertainty Values

For more information about the clock transfer types, refer to

Chapter 1,

About HardCopy II Clock Uncertainty Calculator

. In addition, there are

examples of clock transfer types in

Chapter A, Clock Transfer Examples

of this user guide.

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