Altera HardCopy II Clock Uncertainty Calculator User Manual
Page 59
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A–27
HardCopy II Clock Uncertainty Calculator User Guide
shows an example of a clock-pair = CLK8 to CLK9
Figure A–28. Inter-Clock Domain with Two Independent Clocks and Cascaded PLLs on Source Clock and One
PLL on the Destination Clock
shows input of the PLL index for
, with respect to
the source and destination clocks.
PLL4
PLL11
INBUF2
Source
Clock
Source
Register
Destination
Register
CLK5
CLK8
PLL3
INBUF7
Destination
Clock
CLK9
Table A–28. Location of Input PLLs
Source Clock
Destination Clock
1st PLL
2nd PLL
1st PLL
2nd PLL
4
11
3
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