Altera Transceiver Signal Integrity Development Kit, Stratix V GT Edition - Manual (Page 13)

Chapter 2: Board Components 2–5
Board Overview
May 2014 Altera Corporation Transceiver Signal Integrity Development Kit
Stratix V GT Edition Reference Manual
Memory Devices
U21 Flash memory Micron PC28F00AP30BF, 1-Gb CFI NOR flash memory.
U17 EEPROM Microchip Technology Inc. 93LC46B/SNG-ND, 64x16 EEPROM SO.
Communication Ports
J29 Gigabit Ethernet port
RJ-45 connector which provides a 10/100/1000 Ethernet connection
through a Marvell 88E1111 PHY and the FPGA-based Altera Triple
Speed Ethernet MAC MegaCore function in SGMII mode.
J93 JTAG header
Connects an Altera USB-Blaster dongle to program the FPGA and
MAX II CPLD devices. The embedded USB-Blaster is disabled when
you connect the USB-Blaster to the JTAG header.
CN1 USB Type-B connector
Connects a type-B USB cable to enable the JTAG embedded
USB-Blaster to program the FPGA and MAX II CPLD devices.
Power Supply
J1 DC input jack
14-V – 20-V DC female input power jack. Accepts a 2.5-mm male
center-positive barrel from 14-V DC power supply.
SW1 Power switch Switch to power on/off the board.
J6 S5GX_VCC (0.85 V/0.9 V)
banana jack Banana jack for supplying external V
CC
power to the FPGA. Fuses F1
and F2 must be removed prior to supplying external power to this
banana jack.
J12 VCCA_GXB (2.5 V/3.3 V)
banana jack Banana jack for supplying external V
CCA
power to the FPGA. Fuse F7
must be removed prior to supplying external power to this banana jack.
J9 VCCRT_GXB (0.85 V/1.0 V)
banana jack Banana jack for supplying external V
CCRT_GXB
power to the FPGA. Fuse F6
must be removed prior to supplying external power to this banana jack.
J15 VCCR_GTB (1.0 V) banana
jack Banana jack for supplying external V
CCR_GTB
power to the FPGA. Fuse F3
must be removed prior to supplying external power to this banana jack.
J21 VCCL_GTB (1.0 V) banana
jack Banana jack for supplying external V
CCL_GTB
power to the FPGA. Fuse F5
must be removed prior to supplying external power to this banana jack.
J18 VCCT_GTB (1.0 V) banana
jack Banana jack for supplying external V
CCT_GTB
power to the FPGA. Fuse F4
must be removed prior to supplying external power to this banana jack.
J3 Ground banana jack Banana jack connected to ground.
U10 and U11 Power monitor devices Linear Technology LTC2978, octal PMBus power supply monitor and
controller.
Table 2–1. Transceiver Signal Integrity Development Kit Components (Part 4 of 4)
Board Reference Type Description