Altera Transceiver Signal Integrity Development Kit, Stratix V GT Edition - Manual (Page 7)

Chapter 1: Overview 1–3
Board Component Blocks
May 2014 Altera Corporation Transceiver Signal Integrity Development Kit
Stratix V GT Edition Reference Manual
■ Push button and DIP switches
■ One CPU reset push button
■ One configuration reset push button
■ Four general user push buttons
■ One 8-position user DIP switch
■ One 6-position MSEL control DIP switch
■ One 4-position frequency select and spread spectrum select DIP switch
■ One 4-position transceiver clock input select DIP switch
■ Two 4-position power sequence enable select DIP switches
■ One 4-position VCCRT_GXB/VCCA_GXB voltage select DIP switch
■ Heat sink and fan
■ 40-mm heat sink and fan combo
■ One over-temperature warning indicator LED
■ Power
■ 14-V – 20-V (laptop) DC input
■ One power-on LED
■ One on/off power slide switch
■ Power monitor and trim capability
■ Power sequence capability
■ System Monitoring
■ Temperature—FPGA die
■ Mechanical
■ 7.5" x 10.5" board dimension