Intel IA-32 - Manual (Page 288)

7-20 Vol. 3A
MULTIPLE-PROCESSOR MANAGEMENT
space (1-MByte space). For example, a vector of 0BDH specifies a start-up memory
address of 000BD000H.
11. Enables the local APIC by setting bit 8 of the APIC spurious vector register (SVR).
MOV ESI, SVR ; Address of SVR
MOV EAX, [ESI]
OR EAX, APIC_ENABLED; Set bit 8 to enable (0 on reset)
MOV [ESI], EAX
12. Sets up the LVT error handling entry by establishing an 8-bit vector for the APIC error
handler.
MOV ESI, LVT3
MOV EAX, [ESI]
AND EAX, FFFFFF00H
; Clear out previous vector.
OR EAX, 000000xxH ; xx is the 8-bit vector the APIC error handler.
MOV [ESI], EAX
13. Initializes the Lock Semaphore variable VACANT to 00H. The APs use this semaphore to
determine the order in which they execute BIOS AP initialization code.
14. Performs the following operation to set up the BSP to detect the presence of APs in the
system and the number of processors:
— Sets the value of the COUNT variable to 1.
— Starts a timer (set for an approximate interval of 100 milliseconds). In the AP BIOS
initialization code, the AP will increment the COUNT variable to indicate its presence.
When the timer expires, the BSP checks the value of the COUNT variable. If the timer
expires and the COUNT variable has not been incremented, no APs are present or
some error has occurred.
15. Broadcasts an INIT-SIPI-SIPI IPI sequence to the APs to wake them up and initialize
them:
MOV ESI, ICR_LOW ; Load address of ICR low dword into ESI.
MOV EAX, 000C4500H ; Load ICR encoding for broadcast INIT IPI
; to all APs into EAX.
MOV [ESI], EAX ; Broadcast INIT IPI to all APs
; 10-millisecond delay loop.
MOV EAX, 000C46XXH
; Load ICR encoding for broadcast SIPI IP
; to all APs into EAX, where xx is the vector computed in step 10.
MOV [ESI], EAX; Broadcast SIPI IPI to all APs
; 200-microsecond delay loop
MOV [ESI], EAX; Broadcast second SIPI IPI to all APs
; 200-microsecond delay loop
Step 15:
MOV EAX, 000C46XXH; Load ICR encoding from broadcast SIPI IP
; to all APs into EAX where xx is the vector computed in step 8.