Intel IA-32 - Manual (Page 349)

Vol. 3A 8-25
ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (APIC)
Destination Mode Selects either physical (0) or logical (1) destination mode (see
Section 8.6.2, “Determining IPI Destination”).
Delivery Status (Read Only)
Indicates the IPI delivery status, as follows:
0 (Idle) There is currently no IPI activity for this local
APIC, or the previous IPI sent from this local
APIC was delivered and accepted by the target
processor or processors.
1 (Send Pending)
Indicates that the last IPI sent from this local APIC
has not yet been accepted by the target processor
or processors.
Level For the INIT level de-assert delivery mode this flag must be set to 0;
for all other delivery modes it must be set to 1. (This flag has no
meaning in Pentium 4 and Intel Xeon processors, and will always be
issued as a 1.)
Trigger Mode Selects the trigger mode when using the INIT level de-assert delivery
mode: edge (0) or level (1). It is ignored for all other delivery modes.
(This flag has no meaning in Pentium 4 and Intel Xeon processors,
and will always be issued as a 0.)
Destination Shorthand Indicates whether a shorthand notation is used to specify the destina-
tion of the interrupt and, if so, which shorthand is used. Destination
shorthands are used in place of the 8-bit destination field, and can be
sent by software using a single write to the low doubleword of the
ICR. Shorthands are defined for the following cases: software self
interrupt, IPIs to all processors in the system including the sender,
IPIs to all processors in the system excluding the sender.
00: (No Shorthand)
The destination is specified in the destination field.
01: (Self) The issuing APIC is the one and only destination
of the IPI. This destination shorthand allows soft-
ware to interrupt the processor on which it is exe-
cuting. An APIC implementation is free to deliver
the self-interrupt message internally or to issue the
message to the bus and “snoop” it as with any other
IPI message.
10: (All Including Self)
The IPI is sent to all processors in the system in-
cluding the processor sending the IPI. The APIC
will broadcast an IPI message with the destination
field set to FH for Pentium and P6 family proces-