Timing i/o circuitry, Timing i/o circuitry -25 – National Instruments AT-MIO-16X User Manual
Page 91
Chapter 3
Theory of Operation
© National Instruments Corporation
3-25
AT-MIO-16X User Manual
The digital I/O lines are controlled by the Digital Output Register and
monitored by the Digital Input Register. The Digital Output Register is
an 8-bit register that contains the digital output values for both ports 0
and 1. When port 0 is enabled, bits <3..0> in the Digital Output Register
are driven onto digital output lines ADIO<3..0>. When port 1 is
enabled, bits <7..4> in the Digital Output Register are driven onto
digital output lines BDIO<3..0>.
Reading the Digital Input Register returns the state of the digital I/O
lines. Digital I/O lines ADIO<3..0> are connected to bits <3..0> of the
Digital Input Register. Digital I/O lines BDIO<3..0> are connected to
bits <7..4> of the Digital Input Register. When a port is enabled, the
Digital Input Register serves as a read-back register, returning the
digital output value of the port. When a port is not enabled, reading the
Digital Input Register returns the state of the digital I/O lines driven by
an external device.
Both the digital input and output registers are TTL-compatible. The
digital output ports, when enabled, are capable of sinking 24 mA of
current and sourcing 2.6 mA of current on each digital I/O line. When
the ports are not enabled, the digital I/O lines act as high-impedance
inputs.
The external strobe signal EXTSTROBE*, shown in Figure 3-16, is a
general-purpose strobe signal. Writing to an address location on the
AT-MIO-16X board generates an active low 500-nsec pulse on this
output pin. EXTSTROBE* is not necessarily part of the digital I/O
circuitry but is shown here because it can be used to latch digital
output from the AT-MIO-16X into an external device.
Timing I/O Circuitry
The AT-MIO-16X uses an Am9513A Counter/Timer for data
acquisition timing and for general-purpose timing I/O functions. An
onboard oscillator is used to generate the 10-MHz clock. Figure 3-17
shows a block diagram of the timing I/O circuitry.