Base address register zero (i/o), 0x10, Register: 0x0f – Avago Technologies LSI53C876E User Manual
Page 103: Register: 0x10
PCI Configuration Registers
4-9
Register: 0x0F
BIST
Read Only
This register is used for control and status of BIST. Since the LSI53C876
does not support BIST, this register is read only and always returns a
value of 0x00.
BIST
BIST Capable
7
Start
Start BIST
6
R
Reserved
[5:4]
CC
Completion Code
[3:0]
Register: 0x10
Base Address Register Zero (I/O)
Read/Write
BAR0
Base Address Register Zero - I/O
[31:0]
This 32-bit register has bit zero hardwired to one. Bit 1 is
reserved and returns a zero on all reads, and the other
bits are used to map the device into I/O space. For
detailed information on the operation of this register, refer
to the PCI specification. This
register maps SCSI operating registers into I/O
space.
7
6
5
4
3
0
BIST Capable Start BIST
R
Completion Code
0
0
0
0
0
0
0
0
31
0
BAR0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
1