Avago Technologies LSI53C876E - Manual (Page 258)

6-26 Electrical Characteristics
Figure 6.14 Target Write, from External Memory
t
1
CLK
(Driven by System)
FRAME/
(Driven by Master)
AD/
(Driven by Master-Addr;
C_BE/
(Driven by Master)
IRDY/
(Driven by Master)
TRDY/
(Driven by LSI53C876)
STOP/
(Driven by LSI53C876)
(Driven by LSI53C876)
DEVSEL/
t
2
t
1
1 2 3 4 5 6 7 8 9
LSI53C876-Data)
PAR/
(Driven by Master-Addr;
LSI53C876-Data)
MAD/
(Driven by LSI53C876)
(Driven by LSI53C876)
MAS1/
(Driven by LSI53C876)
MAS0/
(Driven by LSI53C876)
MCE/
(Driven by LSI53C876)
MWE/
(Driven by LSI53C876)
MOE/
Add In
t
1
t
2
In
t
1
t
2
t
1
t
3
High Order Address
Middle Order
Address
t
11
t
12
t
13
10
CMD
Low Order
Address
Byte Enable
t
2
t
1
Data In