Avago Technologies LSI53C876E - Manual (Page 8)

viii Contents
2.4 Serial EEPROM Interface 2-45
2.4.1 Mode A Operation 2-45
2.4.2 Mode B Operation 2-46
2.4.3 Mode C Operation 2-46
2.4.4 Mode D Operation 2-48
2.5 Power Management 2-48
2.5.1 Power State D0 2-49
2.5.2 Power State D1 2-49
2.5.3 Power State D2 2-49
2.5.4 Power State D3 2-50
Chapter 3 Signal Descriptions
3.1 PCI Interface Signals 3-6
3.1.1 System Signals 3-6
3.1.2 Address and Data Signals 3-7
3.1.3 Interface Control Signals 3-8
3.1.4 Arbitration Signals 3-9
3.1.5 Error Reporting Signals 3-9
3.1.6 PCI Interrupt Signals 3-10
3.1.7 GPIO Interface Signals 3-11
3.2 SCSI Bus Interface Signals 3-13
3.2.1 SCSI Bus Interface Signal 3-13
3.2.2 SCSI Bus Interface 3-14
3.3 ROM/Flash Interface Signals 3-18
3.4 Test Interface Signals 3-19
3.5 Power and Ground Signals 3-20
3.5.1 Isolated Power Supplies 3-21
3.6 MAD Bus Programming 3-21
Chapter 4 Registers
4.1 PCI Configuration Registers 4-1
4.2 SCSI Registers 4-20
Chapter 5 SCSI SCRIPTS Instruction Set
5.1 Low Level Register Interface Mode 5-1
5.2 High Level SCSI SCRIPTS Mode 5-2
5.2.1 Sample Operation 5-3