Avago Technologies LSI53C876E - Manual (Page 20)

1-6 General Description
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Performs Wide Ultra SCSI synchronous transfers as fast as
40 Mbytes/s.
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Supports 536-byte DMA FIFO for more effective PCI and SCSI bus
utilization.
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Supports 16 levels of SCSI synchronous offset.
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Supports variable block size and scatter/gather data transfers
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Minimizes SCSI I/O start latency.
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Performs complex bus sequences without interrupts, including
restore data pointers.
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Reduces interrupt service routine overhead through a unique
interrupt status reporting method.
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Supports Load and Store SCRIPTS instructions to increase the
performance of data transfers to and from chip registers.
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Supports target disconnect and later reconnect with no interrupt to
the system processor.
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Supports multithreaded I/O algorithms in SCSI SCRIPTS with fast
I/O context switching.
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Supports expanded Register Move instructions.
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Compatible with LSI53C875 software (drivers and SCRIPTS).
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Enables Ultra SCSI with 40 MHz SCSI clock input with integrated
clock doubler.
1.3.3 Testability
The LSI53C876 contains these testability features:
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All SCSI signals accessible through programmed I/O.
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SCSI loopback diagnostics.
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SCSI bus signal continuity checking.
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Support for single step mode operation.
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Test mode (AND-tree) to check pin continuity to the board.