Scsi chip id (scid), Scsi chip id, Scid) – Avago Technologies LSI53C876E User Manual
Page 126: Register: 0x04
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Registers
Clock Conversion Factor
[2:0]
These bits select a factor by which the frequency of
SCLK is divided before being presented to the SCSI core.
The synchronous portion of the SCSI core can be run at
a different clock rate for fast SCSI, using the
Synchronous Clock Conversion Factor bits. The bit
encoding is displayed in the table below. All other
combinations are reserved.
Note:
It is important that these bits are set to the proper values
to guarantee that the LSI53C876 meets the SCSI timings
as defined by the ANSI specification.
Register: 0x04
SCSI Chip ID (SCID)
Read/Write
R
Reserved
7
RRE
Enable Response to Reselection
6
When this bit is set, the LSI53C876 SCSI function is
enabled to respond to bus-initiated reselection at the chip
ID in the
and
SCF2
CCF2
SCF1
CCF1
SCF0
CCF0
Factor
Frequency
SCSI Clock (MHz)
0
0
0
SCLK/3
50.01–75.0
0
0
1
SCLK/1
16.67–25.0
0
1
0
SCLK/1.5
25.01–37.5
0
1
1
SCLK/2
37.51–50.0
1
0
0
SCLK/3
50.01–75.0
1
0
1
SCLK/4
75.01-80.00
1
1
0
SCLK/6
120
1
1
1
SCLK/8
160
7
6
5
4
3
0
R
RRE
SRE
R
ENC[3:0]
x
0
0
x
0
0
0
0