Avago Technologies LSI53C876E - Manual (Page 297)

LSI53C876/876E PCI to Dual Channel SCSI Multifunction Controller A-1
Appendix A
Register Summary
Table A.1 lists the LSI53C876 configuration registers by register name.
Table A.1 Configuration Registers
Register Name Address Read/Write Page
Base Address Register One (Memory) 0x14 Read/Write 4-10
Base Address Register Two (Memory) 0x18 Read/Write 4-10
Base Address Register Zero (I/O) 0x10 Read/Write 4-9
BIST 0x0F Read Only 4-9
Cache Line Size 0x0C Read/Write 4-7
Capabilities Pointer 0x34 Read Only 4-14
Capability ID 0x40 Read Only 4-16
Class Code 0x09 Read Only 4-7
Command 0x04 Read/Write 4-3
Data 0x47 Read Only 4-20
Device ID 0x02 Read Only 4-3
Expansion ROM Base Address 0x30 Read/Write 4-13
Header Type 0x0E Read Only 4-8
Interrupt Line 0x3C Read/Write 4-14
Interrupt Pin 0x3D Read Only 4-15
Latency Timer 0x0D Read/Write 4-8
Max_Lat 0x3F Read Only 4-16
Min_Gnt 0x3E Read Only 4-15