Mitsubishi Motors DS5000TK - Manual (Page 11)

USER’S GUIDE
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SECTION 4: PROGRAMMER’S GUIDE
The Secure Microcontroller uses nonvolatile RAM
technology for both Program and Data memory. It uses
NV SRAM in place of ROM by write protecting and de-
coding memory segments that a user designates as
Program memory. The remaining RAM area is used as
nonvolatile data storage. One of the advantages of
breaking a common RAM into two segments is that a
smaller number of memory chips is needed. For exam-
ple, if a system requires 24K bytes of program memory
and 4K bytes of data memory, this all fits within one
32K x 8 SRAM. The Secure Microcontroller can break
this RAM into program and data segments, uncondition-
ally write protecting the program area. The process of
dividing the common memory space into ROM and
RAM is called partitioning. All Secure Microcontrollers
are capable of doing this. However, there are differ-
ences between original DS5000 series [includes
DS5000FP, DS5000(T), and DS2250T] and newer
DS5001 series [includes DS5001FP, DS2251T,
DS5002FP, DS2252T]. The original DS5000 series
could partition one SRAM of up to 32K bytes. It could ac-
cess a second RAM, but this was restricted to data
memory only. The DS5001 series can partition two
32K byte SRAMs, or even one 128K x 8 SRAM. Com-
mon elements of the programming model are given be-
low, with individual differences highlighted.
Secure Microcontroller Memory
Organization
All Secure Microcontrollers follow the standard 8051
convention of three memory areas. These include Inter-
nal registers, Program memory and Data memory.
These memory areas are not contiguous and are ac-
cessed in different ways. The Secure Microcontroller
duplicates all standard 8051 registers and adds several
new ones. Secure Microcontrollers have a 64K byte
program and 64K byte data space. However, the
Secure Microcontrollers provide several ways to access
these areas, and these features are what make the fam-
ily unique. Figure 4–1 shows the memory map of
Secure Microcontrollers in general terms. The specific
details and access to the memory areas are discussed
below.
SECURE MICROCONTROLLER MEMORY MAP Figure 4–1
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
ПППП
64K
SPECIAL
FUNCTION
REGISTERS
SCRATCH PAD
REGISTERS
INTERNAL REGISTERS
PROGRAM
MEMORY
DATA
MEMORY
0000
FFh
7Fh
00
– FFFFh–
Internal Registers
The internal register space is divided into two parts.
These are Scratchpad Registers and Special Function
Registers (SFRs). There are a total of 128 Scratchpad
registers, commonly referred to as on–chip RAM. The
128 bytes include four 8–byte banks of working regis-
ters (R0–R7). The Scratchpad Registers are located at
register addresses 00–7Fh. This area is not located in
the Program or Data Memory area and is accessed by
different instructions. The Special Function Registers
(SFR) are located in the locations between 80h and
FFh. SFRs control the on–chip peripherals and memory
configurations. Direct addressing should be used to ac-
cess the SFR locations. If Register–Indirect addressing
is used, indeterminate data will be returned. Scratchpad
Registers are discussed immediately below, with SFR
descriptions following later in this section.