Mitsubishi Motors DS5000TK User Manual
Page 113
USER’S GUIDE
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In most applications, Timer 1 will be configured as a tim-
er which uses the internal clock oscillator frequency as
its clock source. The baud rate will then be divided down
from the time base applied to the XTAL1 and XTAL2
pins. In order to provide the most flexibility, Timer 1
should be programmed to operate in Mode 2 which con-
figures TL1 as an 8–bit timer which is automatically re-
loaded with the value held in TH1 when its timeout
condition is reached. This operational mode is selected
by assigning the TMOD register control bits in the fol-
lowing configuration:
D7
D6
D5
D4
D3
D2
D1
D0
GATE
C/T
M1
M0
GATE
C/T
M1
M0
0
0
1
0
X
X
X
X
In the configuration selected above, the baud rate for the serial port can be expressed as:
Serial I
ń
O Mode 1, 3 Baud Rate
+
2
SMOD
32
X
1
12t
CLK
(256
*
(TH1))
Table 14–2 lists some commonly used baud rates which
can be derived by using Timer 1 in the timer configura-
tion described above with a 11.059 MHz crystal as the
time base.
TIMER 1 BAUD RATE GENERATION Table 14–2
BAUD RATE (BPS)
1/t
CLK
(MHz)
SMOD
(PCON.7)
TIMER 1
C/T
TIMER
MODE
TH1
19200
11.059
1
0
2
0FDH
9600
11.059
0
0
2
0FDH
4800
11.059
0
0
2
0FAH
2400
11.059
0
0
2
0F4H
1200
11.059
0
0
2
0E8H
300
11.059
0
0
2
0A0H
When Timer 1 is used in this manner its interrupt should
be disabled since the timeout period is much faster than
is reasonable for interrupt response and service by the
application software. See the application note at the
end of this section.
SYNCHRONOUS OPERATION (MODE 0)
Mode 0 is the synchronous operating Mode 0 of the
Serial I/O Port. It is intended primarily for transferring
data to external shift registers or for communication with
serial peripheral devices. The word length is eight bits
on both transmit and receive. Serial data is both input
and output on the RXD pin. Both transmit and receive
data are synchronized to a clock signal which is output
on the TXD pin at the serial data rate fixed at 1/12 of the
frequency of the clock oscillator. A block diagram of the
serial I/O port and timing waveforms for Mode 0 is
shown in Figure 14–2 as a reference for the following
discussion.
Serial data output is initiated following any instruction
which causes data to be written to the Transmit Shift
register located at the SBUF register address. At the
time that data is written to the Transmit Shift register, a 1
is simultaneously written to the 9th bit position of the
register (D8). The internal WRSBUF signal is pulsed
during S6P2 and data is shifted out LSB first beginning
at S6P2 of the next machine cycle. The contents of the
Transmit Shift register are shifted to the right one posi-
tion during S6P2 of every machine cycle until D7 has
been output. As each shift right operation is performed,
a 0 is shifted into the MSB position from the left. At the
end of the D7 bit time, another shift is performed at S6P2
which loads the output latch of RXD with the 1 which