Mitsubishi Motors DS5000TK - Manual (Page 13)

USER’S GUIDE
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The 8051 instruction set allows efficient (single cycle)
access to variables when using the Working Registers.
These are a group of four 8–byte banks of Scratchpad
RAM. The active Working Registers are referred to as
R0–R7. They reside between location 00h and 1Fh, de-
pending on which bank is currently selected. Two bits in
the Special Function Register PSW called R1 (PSW.4) and R0 (PSW.3) are used to determine which is the ac-
tive bank. Once selected, all instructions involving
R0–R7 will be directed to the selected group of 8 bytes.
This scheme also allows for a fast context switch by
simply changing banks. The following Table shows the
operation of the Register Bank selection.
PSW.4–3 ; R1–R0
Register Bank Select
Used to select an 8–byte bank of registers to be assigned as R0–R7.
R1 R0 BANK STARTING ADDRESS (R0)
0 0 00h
0 1 08h
1 0 10h
1 1 18h
Program and Data Memory
The Secure Microcontroller divides its main memory be-
tween Program and Data segments. Each map consists
of a 64K byte area from 0000h to FFFFh. Program
memory is inherently read only, since there are no 8051
instructions that write to this segment. Data memory is
read and write accessible without restrictions. The CPU
automatically routes program fetches to the program
area and MOVX instructions to the data memory area.
All of these elements are in common with the standard
8051. Secure Microcontroller differences lie in the
memory interface, memory map control, and flexibility of
the memory resources.
Secure Microcontrollers provide two separate buses for
memory access. First is a Byte–wide address/data bus
which is new to the 8051 architecture. This bus also pro-
vides a switched supply output that make standard
SRAM into nonvolatile memory, decoded chip enables,
and a R/W strobe. Furthermore, the Byte–wide bus
allows nonvolatile RAM memory to be divided between
Program and Data segments. When using a segment of
the RAM as Program Memory, this area can be loaded
using the Bootstrap Loader function described later in
this book.
Second is an Expanded bus constituted by Ports 0 and
2. This is the standard 8051 compatible memory bus
which is available as an option, but is not needed in
most cases. Program memory on the Expanded bus
must be ROM/EPROM and data memory must be vola-
tile SRAM. If NV RAM is needed on the Expanded bus,
then it must be externally backed up and write pro-
tected. The Secure Microcontroller makes no special
provisions for NV RAM on the Expanded bus.
When discussing memory addressing of Secure Micro-
controllers, there are two important terms that are used
frequently: Partition and Range. The Partition is the
user–selectable address that divides the program seg-
ment from the data segment in a common RAM area on
the Byte–wide bus. The Partition is a user–adjustable
boundary that can be selected during Bootstrap Load-
ing or on the fly by the application software. The Range
is the total amount of memory connected to the Byte–
wide bus. This is set once during initial programming.
The DS5000 series devices can access between 8K
and 64K bytes of NV RAM on the Byte–wide bus. Up to
the first 32K bytes are Partitionable into Program and
Data segments as described above. The DS5001 se-
ries can access between 8K and 128K bytes on its
Byte–wide bus with better Partition control. The
Memory map control resides in the MCON (address
C6h) Special Function Register on DS5000 devices. On
DS5001 devices, both the MCON (address C6h) and
RPCTL (address D8h) registers are used. Since the
memory maps and control have significant differences
between these versions, they are described below in
separate sections.