Mitsubishi Motors DS5000TK User Manual

Page 47

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USER’S GUIDE

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47

The 16–bit DPTR register may be used to access any
Data Memory location within the 64K byte space.

MOVX @DPTR,A ; Load the Data Memory location

; pointed to by the contents of the
; DPTR register with the contents
; of the Accumulator.

Immediate Addressing
Immediate Addressing is used to access constants for
use as operands which are contained in the current
instruction in Program Memory.

ORL

A, #040H

; Logical OR of the Accumulator
; with the constant value of 040H

Register–Indirect with Displacement
Register–Indirect with Displacement Addressing is
used to access data in look–up tables in Program
Memory space. The location accessed is pointed to by
the contents of either the DPTR or the PC registers,
which are used as a base register added together with
the contents of the Accumulator (A), which is used as an
index register.

MOVC A, @DPTR+A

; Load the Accumulator with
; the contents of the Program
; Memory location pointed to
; by the value of the DPTR
; register plus the value
; contained in the Accumulator

Relative Addressing
Relative Addressing is used in the determination of a
destination address for the Conditional Branch instruc-
tions. Each of these instructions includes an 8–bit byte
which contains a 2’s complement address offset (–127

to +128) which is added to the PC to determine the des-
tination address which will be branched to when the
tested condition is found to be true. The PC points to the
Program Memory location immediately after the Branch
instruction when the offset is added. If the condition is
found to be not true, then program execution continues
from the address of the following instruction.

JZ

–20

; Branch to the location (PC+2) –

20

; if the contents of the Accumulator
; = 0

Page Addressing
Page Addressing is used by the Control Transfer
instructions to specify a destination address within the
2K byte block in which the next contiguous instruction
resides. The full 16–bit address is calculated by taking
the highest-order five bits for the next contiguous
instruction (PC+2) and concatenating them with the
lowest-order 11–bit filed contained in the current
instruction. 11–bit field provides an efficient instruction
encoding of a destination address for these instructions.

0830

ACALL

100H

; Call to the subroutine at
; address 0100H + current
; page address

In this case the destination address would be 800H +
100H or 900H.

Extended Addressing
Extended Addressing is used in the Control Transfer
Instructions to specify a 16–bit destination address
within the entire 64K byte addressable range of the
Secure Microcontroller.

LJMP

0FF80H

; Jump to address 0FF80H

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