Lacc – Texas Instruments TMS320C2XX User Manual
Page 225
LACC
Load Accumulator With Shift
7-72
Syntax
LACC
dma [, shift]
Direct addressing
LACC
dma, 16
Direct with left shift of 16
LACC
ind [, shift [, ARn] ]
Indirect addressing
LACC
ind, 16[, ARn]
Indirect with left shift of 16
LACC #
lk [, shift]
Long immediate addressing
Operands
dma:
7 LSBs of the data-memory address
shift:
Left shift value from 0 to 15 (defaults to 0)
n:
Value from 0 to 7 designating the next auxiliary register
lk:
16-bit long immediate value
ind:
Select one of the following seven options:
* *+ *– *0+ *0– *BR0+ *BR0–
LACC
dma [ , shift ]
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
1
shift
0
dma
LACC
dma, 16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
1
1
0
1
0
1
0
0
dma
LACC
ind [ , shift [ , ARn ] ]
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
1
shift
1
ARU
N
NAR
Note:
ARU, N, and NAR are defined in Section 6.3,
Indirect Addressing Mode (page 6-9).
LACC
ind, 16[, ARn]
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
1
1
0
1
0
1
0
1
ARU
N
NAR
Note:
ARU, N, and NAR are defined in Section 6.3,
Indirect Addressing Mode (page 6-9).
LACC #
lk [, shift]
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
0
1
1
1
1
1
1
1
0
0
0
shift
lk
Opcode