Texas Instruments TMS320C2XX User Manual
Page 255
MAC
Multiply and Accumulate
7-102
Syntax
MAC
pma, dma
Direct addressing
MAC
pma, ind [, ARn]
Indirect addressing
Operands
dma:
7 LSBs of the data-memory address
pma:
16-bit program-memory address
n:
Value from 0 to 7 designating the next auxiliary register
ind:
Select one of the following seven options:
* *+ *– *0+ *0– *BR0+ *BR0–
MAC
pma, dma
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
0
1
0
0
0
1
0
0
dma
pma
MAC
pma, ind [, ARn]
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
0
1
0
0
0
1
0
1
ARU
N
NAR
pma
Note:
ARU, N, and NAR are defined in Section 6.3,
Indirect Addressing Mode (page 6-9).
Execution
Increment PC, then . . .
(PC)
→
MSTACK
pma
→
PC
(ACC) + shifted (PREG)
→
ACC
(data-memory address)
→
TREG
(data-memory address)
×
(pma)
→
PREG
For indirect, modify (current AR) and (ARP) as specified
(PC) + 1
→
PC
While (repeat counter)
≠
0:
(ACC) + shifted (PREG)
→
ACC
(data-memory address)
→
TREG
(data-memory address)
×
(pma)
→
PREG
For indirect, modify (current AR) and (ARP) as specified
(PC) + 1
→
PC
(repeat counter) – 1
→
repeat counter
(MSTACK)
→
PC
Status Bits
Affected by
Affects
PM and OVM
C and OV
Opcode