Texas Instruments TMS320C2XX - Manual (Page 397)

Troubleshooting
9-29 Synchronous Serial Port
9.7.2 Burst Mode Error Conditions
The following are descriptions of errors that can occur in burst mode:
- Underflow. Underflow is caused if an external FSX occurs, and there are
no new words in the transmit FIFO buffer. Upon receiving the FSX (gener-
ally, from an external clock source), transmitter resends the previous
word; that is, the value in XSR will be transmitted again.
- Overflow. This error occurs when the device has not read incoming data
and more data is being sent (indicated by a frame sync pulse on FSR). The
OVF bit of the SSPCR is set to indicate overflow. The processor halts up-
dates to the FIFO buffer until the SDTR is read. Thus, any further data sent
is lost.
- Frame sync pulse during a reception. If the frame sync occurs during
a reception, the present reception is aborted and a new one begins. The
data that was being loaded into the RSR is lost, but the data in the FIFO
buffer is not. No RSR-to-FIFO buffer copy occurs until all 16 bits in a word
have been received.
- Frame sync pulse during a transmission. Another error results when
a frame sync occurs while a transmission is in process. If the data in the
XSR is being driven on the DX pin when the frame sync pulse occurs, then
the present transmission is aborted. Then, whatever data is next in the
FIFO buffer at the time of the frame sync pulse is transferred to XSR for
transmission.
9.7.3 Continuous Mode Error Conditions
The following are descriptions of continuous mode errors and how the port re-
sponds to them:
- Underflow. Underflow occurs when the XSR is ready to accept new data
but there are no new words in the transmit FIFO buffer. Underflow errors
are fatal to a transmission; it causes transmission to halt. For as long as
the transmit FIFO buffer is empty, frame sync pulses are ignored. If new
data is then written to the SDTR, another frame sync pulse is required (or
generated, if you are using internal frame syncs) to restart continuous
mode transmission.
Your software can do the following to determine how many words are left in
the transmit FIFO buffer:
J Test for the condition TCOMP = 0. When the transmit FIFO buffer
empties, the TCOMP bit of the SSPCR is set to 0.
J Cause an interrupt (XINT) to occur based on the contents of the buffer.
You can use bits FT1 and FT0 in the SSPCR to set the interrupt trigger
conditions shown in Table 9–3 on page 9-9.