Texas Instruments TMS320C2XX - Manual (Page 587)

Index
Index-24
TSS bit
’C203/C204 8-12
’C209 11-16
TX pin 10-4
TXM bit 9-11
TXRXINT bit
in interrupt flag register (IFR) 5-21
in interrupt mask register (IMR) 5-23
TXRXINT interrupt
flag bit 5-21
mask bit in IMR 5-23
priority 5-16
vector location 5-16
U
unconditional instructions
unconditional branch 5-8
unconditional call 5-8
unconditional return 5-9
underflow in synchronous serial port
burst mode 9-29
continuous mode 9-29
URST bit 10-7
W
wait states
definition F-25
for data space
’C203/C204 8-15
’C209 11-17
for I/O space
’C203/C204 8-15
’C209 11-17
for program space
’C203/C204 8-15
’C209 11-17
generating with READY signal 8-14
wait states (continued)
generating with wait-state generator
’C203/C204 8-14 to 8-17
’C209 11-16 to 11-18
wait-state generator 8-14 to 8-16
’C209 11-16 to 11-18
introduction 2-11
wait-state generator control register (WSGR) 8-15
’C209 11-17
quick reference A-10
WE (write enable pin)
definition 4-4
shown in figure 4-6, 4-10, 4-13, 4-26
write enable pin (WE)
definition 4-4
shown in figure 4-6, 4-10, 4-13, 4-26
WSGR (wait-state generator control register)
’C203/C204 8-15
’C209 11-17
quick reference A-10
X
XDS510 emulator. See emulation; emulator
XF bit (XF pin status bit) 3-17
XF pin 8-18
XINT bit
in interrupt flag register (IFR) 5-21
in interrupt mask register (IMR) 5-23
XINT interrupt
flag bit 5-21
mask bit 5-23
priority 5-16
vector location 5-16
XOR instruction 7-193
XRST bit 9-10
XSR (synchronous serial port transmit shift regis-
ter) 9-5
Z
ZALR instruction 7-196