Rockwell Automation 1203-SM1 SLC to SCANport Communication Module - Manual (Page 60)

M0, M1, and G Files A–4
Publication 1203–5.9 –– October 1996
If you need to show the state of the M0 or M1 addressed bit, you can
transfer the state to an internal processor bit. This is shown below,
where an internal processor bit is used to indicate the true/false state
of a rung.
This rung will not show its true rung state because the EQU instruction
is always shown as true and the M0 instruction is always shown as false.
EQU
EQUAL
Source A N7:12
Source B N7:3
B3 B3 M0:3.0
0 1 1
( ) ] [ ] [
OTE instruction B3/2 has been added to the rung. This instruction shows
the true or false state of the rung.
EQU
EQUAL
Source A N7:12
Source B N7:3
B3 B3 B3
0 1 2
( ) ] [ ] [
( )
M0:3.0
1
M0/M1 Monitoring Option Enabled
Important: The SLC 5/02 processor does not support this option.
The SLC 5/03 and SLC 5/04 processors let you monitor the actual
state of each addressed M0/M1 address (or data table). The
highlighting appears normal when compared to the other processor
data files. The processor’s performance is degraded to the degree of
M0/M1 referenced screen data. For example, if your screen has only
one M0/M1 element, degradation is minimal. If your screen has 69
M0/M1 elements, degradation is significant.
Transferring Data Between Processor Files and M0 and M1 Files
The processor does not contain an image of the M0 or M1 file. As a
result, you must edit and monitor M0 and M1 file data via
instructions in your ladder program. For example, you can copy a
block of data from a processor data file to an M0 or M1 data file or
vice versa using the COP instruction in your ladder program.