Module addressing, Module addressing -2 – Rockwell Automation 1746-NR8 SLC 500 RTD/Resistance Input Module User Manual User Manual

Page 38

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Publication 1746-UM003A-EN-P

3-2 Preliminary Operating Considerations

Module Addressing

The memory map shown in the following illustration displays how the output
and input image tables are defined for the RTD module.

Figure 3.1 Class 1 Memory Map

Channel 0 Configuration Word

Channel 2 Configuration Word
Channel 3 Configuration Word

Channel 4 Configuration Word

Channel 5 Configuration Word
Channel 6 Configuration Word

Channel 7 Configuration Word

Channel 1 Configuration Word

Channel 0 Data Word

Channel 1 Data Word

Channel 2 Data Word

Channel 3 Data Word

Channel 4 Data Word
Channel 5 Data Word

Channel 6 Data Word

Channel 7 Data Word

Word 0

Word 1

Word 2

Word 3

Word 4

Word 5

Word 6

Word 7

O:e.0

O:e.1

O:e.2

O:e.3

O:e.4

O:e.5

O:e.6

O:e.7

Word 0

Word 1

Word 2

Word 3

Word 4

Word 5

Word 6

Word 7

I:e.0

I:e.1

I:e.2

I:e.3

I:e.4

I:e.5

I:e.6

I:e.7

Address

Address

Bit 0

Bit 15

Bit 15

Bit 0

Output
Image

Input
Image

Analog Input

Module

Image Table

Output Image

8 Words

Input Image

8 Words

Output

Scan

Input
Scan

SLC 5/0X
Data Files

Slot e

Slot e

Output Image

Input Image

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