Achronix Speedster22i PCIe - Manual (Page 17)

UG030, April 26, 2013 17

C2SDescControlFlags[7:0] – Control
• Bit 7 – SOP – Set if this Descriptor contains the start of a
packet; clear otherwise; only set for addressable Packet
DMA
• Bit 6 – EOP – Set if this Descriptor contains the end of a
packet; clear otherwise; only set for addressable Packet
DMA
• Bits[5:3] – Reserved
• Bit[2] – Addressable FIFO DMA – If set to 1, the DMA Back-
End will use the same Card Starting Address for all DMA
Interface transactions for this Descriptor; this bit must be set
the same for all Descriptors that are part of the same packet
transfer; Addressable FIFO AXI addresses must be chosen
by the user design such that they are aligned to AXI max
burst size * AXI data width address boundaries; For
example: 16 * 16 == 256 bytes (addr[7:0] == 0x00) for AXI3
max burst size == 16 and AXI_DATA_WIDTH == 128-bits ==
16 bytes
• Bit[1] – IRQOnError – Set to generate an interrupt when this
Descriptor Completes with error; clear to not generate an
interrupt when this Descriptor Completes with error
• Bit[0] – IRQOnCompletion – Set to generate an interrupt
when this Descriptor Completes without error; clear to not
generate an interrupt when this Descriptor Completes
without error

C2SDescStatusFlags[7:0] – Status
• Bit 7 – SOP – Set if this Descriptor contains the start of a
packet; clear otherwise
• Bit 6 – EOP – Set if this Descriptor contains the end of a
packet; clear otherwise
• Bits[5] – Reserved
• Bit 4 – Error – Set when the Descriptor completes due to an
error; clear otherwise
• Bit 3 – C2SDescUserStatusHighIsZero – Set if
C2SDescUserStatus[63:32] == 0; clear otherwise
• Bit 2 – C2SDescUserStatusLowIsZero – Set if
C2SDescUserStatus[31:0] == 0; clear otherwise
• Bit 1 – Short – Set when the Descriptor completed with a
byte count less than the requested byte count; clear
otherwise; this is normal for C2S Packet DMA for packets
containing EOP since only the portion of the final Descriptor
required to hold the packet is used.
• Bit 0 – Complete – Set when the Descriptor completes
without an error; clear otherwise

C2SDescByteCount[19:0] - Status
• The number of bytes that the DMA Engine wrote into the
Descriptor. If EOP=0, then C2SDescByteCount will be the
same as the Descriptor size DescByteCount. If EOP=1 and