Achronix Speedster22i PCIe - Manual (Page 62)

UG030, April 26, 2013 62
Field Name Default Values Description Verilog Parameter
{MSI-X Table Offset[31:3], 000} is
the QWORD aligned address
offset in the Base Address
Register where the MSI-X Table
starts. For example if the MSI-X
Table is located at BAR0 offset
0x10000, then MSI-X Table BIR ==
000 and {MSI-X Table Offset[31,3],
000} = 0x00010000.
MSI-X PBA
Bar
Indicator BAR0 BAR0,
BAR1, BAR2 MSI-X PBA BIR[2:0] – Value to
place into MSI-X Capability : PBA
BIR field.
Same as MSI-X Table BIR, but
indicates the Base Address
Register of the MSI-X PBA rather
than the MSI-X Table. See MSI-X
Table BIR and MSI-X Table Offset
description for additional
information. CFG_CONTROL_MSI_X_
PBA_BIR
MSI-X PBA
Offset 0x0000 29-Bit hex MSI-X PBA Offset[31:3] - Value to
place into MSI-X Capability : PBA
Offset field.
Same as MSI-X Table Offset, but
indicates the Base Address
Register offset for the MSI-X PBA
rather than the MSI-X Table. See
MSI-X Table BIR and MSI-X Table
Offset description for additional
information. CFG_CONTROL_MSI_X_
PBA_OFFSET
Gen 3 Equalization