Achronix Speedster22i PCIe - Manual (Page 7)

UG030, April 26, 2013 7
o Decodes received packets to provide key routing (BAR hits, Tag, etc.)
information for the user
o Implements all aspects of the required PCIe Configuration Space; user can add
custom Capabilities Lists and Configuration Registers via the Configuration
Register Expansion Interface
o Consumes PCI Express Message TLPs and provides contents on the simple–to-
use Message Interface
o Complete and easy-to-use Legacy/MSI/MSI-X interrupt generation
o Interfaces have consistent timing and function over all modes of operation
o Provides a wealth of diagnostic information for superior system-level debug and
link monitoring

Implements all 3 PCI Express Layers (Transaction, Data Link, Physical)