4 operating mode control, Toshiba – Toshiba TMP87CP24AF User Manual

Page 22

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TOSHIBA

TMP87CM24A/P24A

1.8.4 Operating Mode Control

(1)

STOP

mode (STORI, STOP2)

STOP mode is controlled by the system control register 1 (SYSCR1) and the STOP pin input. The STOP

pin is also used both as a port P20 and an INT5 (external interrupt input 5) pin. STOP mode is started

by setting STOP (bit 7 in SYSCR1) to "1". During STOP mode, the following status is maintained.

© Oscillations are turned off, and all internal operations are halted.

@

The

data

memory,

registers

(except

for

DBR)

and

port

output

latches

are

all

held

in

the

status

in

effect

before

STOP

mode

was

entered.

The

port

output

can

be

select

either

output

hold or high-impedance by setting OUTEN ( bit 4 in SYSCR1).

(3)

The divider of the timing generator is cleared to "0".

@

The

program

counter

holds

the

address

of

the

instruction

following

the

instruction

which

started the STOP mode.

STOP

mode

includes

a

level-sensitive

release

mode

and

an

edge-sensitive

release

mode,

either

of

which can be selected with RELM (bit

6

in SYSCR1).

a. Level-sensitive release mode (RELM = 1)

In

this

mode,

STOP

mode

is

released

by

setting

the

STOP

pin

high.

This

mode

is

used

for

capacitor back-up when the main power supply is cut off and long term battery back-up.

When

the

STOP

pin

input

is

high,

executing

an

instruction

which

starts

the

STOP

mode

will

not

place

in

STOP

mode

but

instead

will

immediately

start

the

release

sequence

(warm-up).

Thus,

to

start

STOP

mode

in

the

level-sensitive

release

mode,

it

is

necessary

for

the

program

to

first

confirm that the STOP pin input is low. The following method can be used for confirmation:

• Using an external interrupt input INT5 (INT5 is a falling edge-sensitive input).

Example : Starting STOP mode with an INT5 interrupt.

PINTS :

SINT5 :

TEST

(P2). 0

; To reject noise, the STOP mode does not start if

JRS

F, SINTS

port P20 is at high

LD

(SYSCR1),01000000B

; Sets up the level-sensitive release mode.

SET

(SYSCRD.7

; Starts STOP mode

LDW

(IL), 1110011101010111B

; IL12, 11,7, S,3<-0

RETI

STOP pin

XOUTpin

fi

HI

NORMAL

operation

T

______ STOP ____________

operation

Confirm by program that the
STOP pin input is low and
start STOP mode.

V

Warm-up

NORMAL

operation

STOP mode is released by the hardware.

/ Always released if the STOP \

V

pin input is high.__________

J

Figure 1-16. Level-sensitive Release Mode

Note 1:

Note 2:

After warm-up start, even /f STOP pin input is low again, STOP mode does not restart.

When changing to the level-sensitive release mode from the edge-sensitive release

mode, the release mode is not switched until a rising edge of the STOP pin input is

detected.

3

-

24-22

2002

-

10-03

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