2 control, 3 function, Toshiba – Toshiba TMP87CP24AF User Manual
Page 77
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TOSHIBA
TMP87CM24A/P24A
2.7.2 Control
The
timer/counter
3
is
controlled
by
a
timer/counter
3
control
register
(TC3CR)
and
two
8
-bit
timer
registers (TREG3A and TREG3B). Reset does not affect these timer registers.
TREG3A
(0018
h
)
TREG3B
(0019
h
)
TC3CR
(OOIA
h
)
1
0
Read/Write
Read only
SCAP
TC3S
TC^CK
TC3M
(Initial value :
*0*0 00*0)
TC3M
Timer/counter 3
0 : Timer/event counter
operation mode set
1 : Capture
00 : Internal clock fc/2’^ or fs/2" [Hz]
TC3CK
Timer/counter 3
01 : Internal clock fc/2’° or fs/2^
source clock select
10 : Internal clock fc/2^
Write
11 : External clock (TC3 pin input)
only
TC3S
Timer/counter 3
0 : Stop and clear
start select
1 : Start
SCAP
Software capture control
0 :
1 : Software capture
Note 1
Note 2
Note 3
Note 4:
Note 5:
fc: High-frequency clock [Hz] fs: Low-frequency clock [Hz] *: Don't care
Set the mode, the source clock and the edge selection (INT3ES) when the TC3 stops (TC3S = 0).
Values to be loaded into timer register 3A must satisfy the following condition.
TREG3A > 0 (in the timer/event counter mode)
Software capture can be used in only timer and event counter mode.
TC3CR is a write-only register, which cannot access any of in read-modify-write instruction such
as bit operate, etc.
Figure 2-27. Timer Register 3A/3B and TC3 Control Register
2.7.3 Function
The timer/counter 3 has three operating modes : timer, event counter, and capture mode.
(1)
Timer Mode
In
this
mode,
the
internal
clock
is
used
for
counting
up.
The
contents
of
TREG3A
are
compared
with
the
contents
of
up-counter.
If
a
match
is
found,
a
timer/counter
3
interrupt
(INTTC3)
is
generated,
and
the
up-counter
is
cleared.
Counting
up
resumes
after
the
up-counter
is
cleared.
The
current
contents
of
up-counter
are
loaded
into
TREG3B
by
setting
SCAP
(bit
6
in
TC3CR)
to
"1".
SCAP
is
automatically cleared after capturing.
Table 2-5. Source Clock (Internal Clock) for Timer Counter 3
Source clock
Resolution
Maximum time setting
NORMAL1/2, DLE1/2mode
SLOW, SLEEP mode
DV7CK = 0
DV7CK= 1
Atfc = 8MHz
At fs = 32.768 kHz
Atfc = 8MHz
At fs = 32.768 kHz
fc/2’2
fs/2^ [Hz]
fs/2^ [Hz]
512
pS
488.28
fxs
130.6 ms
124.5 ms
fc/2’°
fs/2^
-
128
/xS
122.07
ixs
32.6 ms
31.1 ms
fc/2'
fc/2'
-
16
fxS
-
4.1 ms
-
3
-
24-77
2002
-
10-03