Toshiba – Toshiba TMP87CP24AF User Manual
Page 89
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TOSHIBA
TMP87CM24A/P24A
(3)
8
-bit Transmit/Receive Mode
After
setting
the
control
registers
to
the
8
-bit
transmit/receive
mode,
write
the
data
to
be
transmitted
first
to
the
data
buffer
registers
(DBR).
After
that,
enable
transceiving
by
setting
SlOSto
" 1 W h e n
transmitting,
the
data
are
output
from
the
SO
pin
at
leading
edges
of
the
serial
clock.
When
receiving,
the
data
are
input
to
the
SI
pin
at
the
trailing
edges
of
the
serial
clock.
8
-bit
data
are
transferred
from
the
shift
register
to
the
data
buffer
register.
An
INTSIO
interrupt
is
generated
when
the
number
of
data
words
specified
with
the
BUF
has
been
transferred.
The
interrupt
service
program
reads
the
received
data
from
the
data
buffer
register
and
then
writes
the
data
to
be
transmitted.
The
data
buffer
register
is
used
for
both
transmitting
and
receiving;
therefore,
always
write the data to be transmitted after reading the received data.
When the internal clock is used, a wait is initiated until the received data are read and the next data
are written. A wait will not be initiated if even one data word has been written.
Note: The wait is also canceld by writing to a DBR not being used as a transmit data buffer
register; therefore, during SIO do not use such DBR for other applications.
When
an
external
clock
is
used,
the
shift
operation
is
synchronized
with
the
external
clock;
therefore,
it
is
necessary
to
read
the
received
data
and
write
the
data
to
be
transmitted
next
before
starting
the
next
shift
operation.
When
an
external
clock
is
used,
the
transfer
speed
is
determined
by
the
maximum
delay
between
generation
of
an
interrupt
request
and
the
received
data
are
read
and
the data to be transmitted next are written.
When
the
receive
is
started,
after
the
SlOF
goes
"high"output
from
the
SO
pin
holds
final
bit
of
the
last data until falling edge of the SCK.
The
transmit/receive
operation
is
ended
by
clearing
SlOSto
"0"
or
setting
SIOINH
to
"1"
in
interrupt
service program.
When
SIOS
is
cleared,
the
current
data
are
transferred
to
the
data
buffer
register
in
8
-bit
blocks.
The
transmit
mode
ends
when
the
transfer
is
completed
SlOF
is
cleared
to
"0"
when
receiving
is
ended
and thus can be sensed by program to confirm that receiving has ended.
When SIOINH is set, the transmit/receive operation is immediately ended and SlOF is cleared to "0".
If
it
is
necessary
to
change
the
number
of
words
in
external
clock
operation,
SIOS
should
be
cleared
to "0", then BUF must be rewritten after confirming that Siof has been cleared to "0".
3
-
24-89
2002
-
10-03