Toshiba – Toshiba TMP87CP24AF User Manual
Page 40
Attention! The text in this document has been recognized automatically. To view the original document, you can use the "Original mode".
TOSHIBA
TMP87CM24A/P24A
Table 1-3. (a) External Interrupts
SOURCE
Pin
Secondary
function
Enable
Condition
Edge
Digital noise reject
rising
falling
both
INTO
TÑÍÜ
P10
IMF= 1,
INT0EN = 1
-
o
-
— (hysteresis input)
INTI
INTI
P11
IMF- EF
5
= 1
INTIES
=
0
INTIES
=
1
—
Note 1)
INT2
INT2
P12/TC1
IMF- EFy= 1
INT2ES
=
0
INT2ES
=
1
—
Note 2)
INT3
INT3
P40/TC3
IMF- EFii = 1,
INT3W = 0
INT3ES
=
0
INT3ES
=
1
Note 3)
IMF- EFii = 1,
INT3W= 1
INT3W
=
1
Notes)
Note 4)
INT5
TÑÍ5
P20/STOP
IMF- EF
i
5
= 1
-
O
-
— (hysteresis input)
Note 1: Pulses less than 15/fc [s] or 63/fc [s] are cancelled as noise. Pulses equal to or more than 48/fc [s] or 192/fc [s] are
regarded as signals.
Note 2: Pulses less than 7/fc [s] are cancelled as noise. Pulses equal to or more than 24/fc [s] are regarded as signals.
Note 3: For falling or rising edge, pulses less than 7/fc [s] are cancelled as noise. Pulses equal to or more than 24/fc [s] are
regarded as signals. Same applies to pin TC3 (at one edge).
Note 4: Noise cancellation conditions are as listed in Table 1-3 (b). They are applied to the INT3 pin when it is used for
both-edge interrupts. To detect remote control signals using timer 3 in capture mode, the INT3 pin is used for
both-edge interrupts.
Note 5: To detect the edge at which an interrupt is generated, read bit 7 (INTEDT) in EINT3CR (#001 F
h
), that is, at the
beginning of the interrupt processing routine.
INTEDT is valid only for both-edge interrupts (INT3W =1). INTEDT is set to 1 by an interrupt as the non-selected
edge; cleared to 0 after read automatically.
For both-edge interrupts, rising or falling edge is selected by setting/modifying bit 3 (INT3ES) in EINTCR (#0037
h
).
When rising edge is selected (INT3ES = 0), bit 7 in INTEDT (^01 F
h
) is set to 1 when a falling edge is detected at the
INT3 pin. (That is, remains 0 if rising edge is detected.)
When falling edge is selected (INT3ES = 1), bit 7 in INTEDT: #001 F
h
is set to 1 when a rising edge is detected at the
INT3 pin. (That is, remains 0 at falling edge.)
Table 1-3. (b) Noise reject condition for INT3 (both-edge interrupt)
EINT3CR
max pulse width
for noise reject
min pulse width
for immediate signal
NCS2
NCS1
NCSO
0
0
0
- (histeresis input)
0
0
1
(26/fc) x7-6/fc
(26/fc)
X
8
+ 5/fc
0
1
0
(27/fc)
X
7 -
6
/fc
(27/fc)
X
8
+ 5/fc
0
1
1
(
28
/fc) x7-6/fc
(28/fc)
X
8
+ 5/fc
1
0
0
(29/fc) x7-6/fc
(29/fc)
X
8
+ 5/fc
1
0
1
(2io/fc)x7-6/fc
(210/fc) x
8
+ 5/fc
1
1
0
(211/fc)
X
7 -
6
/fc
(211/fc)
X
8
+ 5/fc
1
1
1
(2i2/fc)x7-6/fc
(2i2/fc)x8 + 5/fc
Note: In SLOW mode, set (NCS) = (0,0,0).
In SLOW mode, the digital noise filter in the above table is disabled.
3
-
24-40
2002
-
10-03