Altera Nios Development Board - Manual (Page 18)

2–10 Altera Corporation
Nios Development Board Reference Manual, Stratix II Edition July 2005
Seven-Segment LEDs (U8 & U9)
Figure 2–2. Push Button Switches & Individual LEDs
Seven-Segment
LEDs (U8 & U9) U8 and U9 are connected to the Stratix II device so that each segment is
individually controlled by a general-purpose I/O pin. When the Stratix II
pin drives logic 0, the corresponding LED turns on. See
Figure 2–3 for
Stratix II pin-out details.
Figure 2–3. Seven-Segment LEDs
SRAM Memory
(U35 & U36) U35 and U36 are IDT IDT71V416S, 512 Kbyte x 16-bit asynchronous
SRAM devices. They are connected to the Stratix II device so they can be
used by a Nios II embedded processor as general-purpose memory. The
two 16-bit devices can be used in parallel to implement a 32-bit wide
memory subsystem. The factory programmed Nios II reference design
identifies these SRAM devices in its address space as a contiguous
1Mbyte, 32-bit-wide, zero-wait-state main memory.
The SRAM devices share address and data connections with the flash
memory and the Ethernet MAC/PHY device. For shared bus
information, see
Appendix A, Shared Bus Table .