Intel 21555 - Manual (Page 39)

21555 Non-Transparent PCI-to-PCI Bridge User Manual 39
Address Decoding
Figure 7 shows how a translated address is built using the lookup table, assuming a page size of 4 KB.
Figure 8 shows an example of how different address regions might be forwarded upstream using the lookup table
address translation.
The lookup table is implemented on-chip and no external memory is needed. The lookup table is part of the
memory space that the 21555 requests with its Primary CSR Memory BAR and Secondary CSR Memory BAR.
The lookup table is also indirectly accessible in I/O or memory space at offsets 24h and 28h.
Figure 7. Address Translation Using A Lookup Table
A7465-01
31 0
31 18 17 0
Translated Base Offset
12 11
Base Index Offset
12 11
3F
3E
3D
3C
3B
3A
39
7
6
5
4
3
2
1
0
Translated Base Address [3F]
Translated Base Address [3E]
Translated Base Address [Index]
Translated Base Address [1]
Translated Base Address [0]
Translated Base Look-up Table