Samsung S3C2440A User Manual
Page 183
MEMORY CONTROLLER
S3C2440A RISC MICROPROCESSOR
5-18
BANKSIZE REGISTER
Register Address R/W
Description Reset
Value
BANKSIZE
0x48000028
R/W
Flexible bank size register
0x0
BANKSIZE Bit
Description
Initial
State
BURST_EN
[7]
ARM core burst operation enable.
0 = Disable burst operation.
1 = Enable burst operation.
0
Reserved [6]
Not
used
0
SCKE_EN [5]
SDRAM power down mode enable control by SCKE
0 = SDRAM power down mode disable
1 = SDRAM power down mode enable
0
SCLK_EN
[4]
SCLK is enabled only during SDRAM access cycle for
reducing power consumption. When SDRAM is not accessed,
SCLK becomes 'L' level.
0 = SCLK is always active.
1 = SCLK is active only during the access (recommended).
0
Reserved [3]
Not
used
0
BK76MAP
[2:0]
BANK6/7 memory map
010 = 128MB/128MB
001 = 64MB/64MB
000 = 32M/32M
111 = 16M/16M
110 = 8M/8M
101 = 4M/4M
100 = 2M/2M
010