Samsung S3C2440A - Manual (Page 531)

S3C2440A RISC MICROPROCESSOR ELECTRICAL DATA
27-13
HCL
K
nG
C
S
x
tRAD
nO
E
DAT
A
ADD
R
nBE
x
tRCD
tRO
D
tRO
D tRCD
Tacc
tR
AD
tRAD
tRAD
tRAD
tR
AD
tRAD
tRAD
tRAD
tRD
S
tR
DH
tRDS
tRDH
tRDS
tRDH
tRDS
tRDH
tRDS
tR
DH
tR
DS
tRDH
tRDS
tRDH
tRDS
tRD
H
'1
'
Figure 27-9 ROM/SRAM Burst READ Timing Diagram (I)
(Tacs=0, Tcos=0, Tacc=2, Toch=0, Tcah=0, PMC=0, ST=0, DW=16bit)