Samsung S3C2440A - Manual (Page 319)

S3C2440A RISC MICROPROCESSOR UART
11-15
UART MODEM CONTROL REGISTER
There are two UART MODEM control registers including UMCON0 and UMCON1 in the UART block.
Register Address R/W Description Reset Value
UMCON0 0x5000000C R/W UART channel 0 Modem control register 0x0
UMCON1 0x5000400C R/W UART channel 1 Modem control register 0x0
Reserved 0x5000800C - Reserved Undef
UMCONn Bit Description Initial State
Reserved [7:5] These bits must be 0's 00
Auto Flow Control (AFC) [4] 0 = Disable 1 = Enable 0
Reserved [3:1] These bits must be 0's 00
Request to Send [0] If AFC bit is enabled, this value will be ignored. In this case
the S3C2440A will control nRTS automatically.
If AFC bit is disabled, nRTS must be controlled by software.
0 = 'H' level (Inactivate nRTS) 1 = 'L' level (Activate nRTS)
0
Note
UART 2 does not support AFC function, because the S3C2440A has no nRTS2 and nCTS2.