Samsung S3C2440A - Manual (Page 336)

USB DEVICE S3C2440A RISC MICROPROCESSOR
13-8
Register Address R/W Description Reset Value
USB_INT_REG 0x52000158(L)
0x5200015B(B)
R/W
(byte)
USB interrupt pending/clear register 0x00
USB_INT_REG Bit MCU USB Description Initial
State
RESET
Interrupt [2] R
/CLEAR
SET Set by the USB when it receives reset signaling. 0
RESUME
Interrupt [1] R
/CLEAR
SET
Set by the USB when it receives resume signaling, while
in Suspend mode.
If the resume occurs due to a USB reset, then the MCU is
first interrupted with a RESUME interrupt. Once the clocks
resume and the SE0 condition persists for 3ms, USB
RESET interrupt will be asserted.
0
SUSPEND
Interrupt [0] R
/CLEAR
SET
Set by the USB when it receives suspend signalizing.
This bit is set whenever there is no activity for 3ms on the
bus. Thus, if the MCU does not stop the clock after the
first suspend interrupt, it will continue to be interrupted
every 3ms as long as there is no activity on the USB bus.
By default, this interrupt is disabled.
0