Document Outline

• AT-MIO-16X User Manual
  • Important Information
    • Warranty
    • Copyright
    • Trademarks
    • Warning
  • Table of Contents
  • About This Manual
    • Organization of This Manual
    • Conventions Used in This Manual
    • Related Documentation
    • Customer Communication
  • Chapter 1 Introduction
    • About the AT-MIO-16X
      • Analog Input
      • Analog Output
      • Digital and Timing I/O
    • What You Need to Get Started
    • Software Programming Choices
      • National Instruments Application Software
      • NIDAQ Driver Software
      • RegisterLevel Programming
    • Optional Equipment
    • Unpacking
  • Chapter 2 Configuration and Installation
    • Board Configuration
      • AT Bus Interface
      • Base I/O Address Selection
      • Interrupt and DMA Channel Selection
    • Analog Input Configuration
      • Input Mode
        • DIFF Input (Eight Channels)
        • RSE Input (16 Channels)
        • NRSE Input (16 Channels)
      • Input Polarity and Input Range
        • Considerations for Selecting Input Ranges
    • Analog Output Configuration
      • Analog Output Reference Selection
      • Analog Output Polarity Selection
    • Digital I/O Configuration
    • Board and RTSI Clock Configuration
    • Hardware Installation
    • Signal Connections
      • Signal Connection Descriptions
      • Analog Input Signal Connections
      • Types of Signal Sources
        • Floating Signal Sources
        • Ground-Referenced Signal Sources
      • Input Configurations
        • Differential Connection Considerations (DIFFInput...
        • Differential Connections for Ground-Referenced Sig...
        • Differential Connections for Nonreferenced or Floa...
        • Single-Ended Connection Considerations
        • Single-Ended Connections for Floating Signal Sourc...
        • Single-Ended Connections for Grounded Signal Sourc...
        • Common-Mode Signal Rejection Considerations
      • Analog Output Signal Connections
      • Digital I/O Signal Connections
      • Power Connections
      • Timing Connections for Data Acquisition and Analog...
        • SCANCLK Signal
        • EXTSTROBE* Signal
        • EXTCONV* Signal
        • EXTTRIG* Signal
        • EXTGATE* Signal
        • EXTTMRTRIG* Signal
        • Counter Signal Connections
    • Field Wiring Considerations
    • Cabling Considerations for the AT-MIO-16X with 50-...
    • Cabling Considerations for the AT-MIO-16X with 68-...
  • Chapter 3 Theory of Operation
    • Functional Overview
    • PC I/O Channel Interface Circuitry
    • Analog Input and Data Acquisition Circuitry
      • Analog Input Circuitry
        • A/D Converter
        • Analog Input Multiplexers
        • Analog Input Configuration
        • PGIA
        • ADC FIFO Buffer
        • Analog Input Calibration
      • Data Acquisition Timing Circuitry
        • Single-Read Timing
        • Single-Channel Data Acquisition Timing
      • Multiple-Channel Data Acquisition
        • Continuous Scanning Data Acquisition Timing
        • Interval Scanning Data Acquisition Timing
        • Data Acquisition Rates
      • Analog Output and Timing Circuitry
        • Analog Output Circuitry
        • Analog Output Configuration
        • Analog Output Calibration
      • DAC Waveform Circuitry and Timing
        • DAC Waveform Circuitry
        • DAC Waveform Timing Circuitry
        • FIFO Continuous Cyclic Waveform Generation
        • FIFO Programmed Cyclic Waveform Generation
        • FIFO Pulsed Waveform Generation
    • Digital I/O Circuitry
    • Timing I/O Circuitry
    • RTSI Bus Interface Circuitry
  • Chapter 4 Register Map and Descriptions
    • Register Map
      • Register Sizes
      • Register Description Format
      • Configuration and Status Register Group
        • Command Register 1
        • Command Register 2
        • Command Register 3
        • Command Register 4
        • Status Register 1
        • Status Register 2
      • Analog Input Register Group
        • ADC FIFO Register
        • CONFIGMEM Register
      • Analog Output Register Group
        • DAC0 Register
        • DAC1 Register
      • ADC Event Strobe Register Group
        • CONFIGMEMCLR Register
        • CONFIGMEMLD Register
        • DAQ Clear Register
        • DAQ Start Register
        • Single Conversion Register
        • ADC Calibration Register
      • DAC Event Strobe Register Group
        • TMRREQ Clear Register
        • DAC Update Register
        • DAC Clear Register
      • General Event Strobe Register Group
        • DMA Channel Clear Register
        • DMATCA Clear Register
        • DMATCB Clear Register
        • External Strobe Register
        • Calibration DAC 0 Load Register
        • Calibration DAC 1 Load Register
      • Am9513A Counter/Timer Register Group
        • Am9513A Data Register
        • Am9513A Command Register
        • Am9513A Status Register
      • Digital I/O Register Group
        • Digital Input Register
        • Digital Output Register
      • RTSI Switch Register Group
        • RTSI Switch Shift Register
        • RTSI Switch Strobe Register
  • Chapter 5 Programming
    • Register Programming Considerations
    • Resource Allocation Considerations
    • Initializing the AT-MIO-16X
      • Initializing the Am9513A
    • Programming the Analog Input Circuitry
      • Single Conversions Using the SCONVERT or EXTCONV* ...
    • Generating a Single Conversion
    • Reading a Single Conversion Result
    • Programming Single-Channel Data Acquisition Sequen...
    • Programming Data Acquisition Sequences with Channe...
      • Continuous Channel Scanning Data Acquisition
    • Interval-Channel Scanning Data Acquisition
    • Data Acquisition Programming Functions
      • Clearing the Analog Input Circuitry
      • Programming Single-Analog Input Channel Configurat...
      • Programming Multiple-Analog Input Channel Configur...
      • Programming the Sample-Interval Counter
      • Programming the Sample Counter(s)
        • Sample Counts 2 through 65,536
        • Sample Counts Greater than 65,536
      • Programming the Scan-Interval Counter
      • Applying a Trigger
      • Servicing the Data Acquisition Operation
      • Resetting the Hardware after a Data Acquisition Op...
        • Resetting a Single Am9513A Counter/Timer
      • Programming the Analog Output Circuitry
      • Cyclic Waveform Generation
      • Programmed Cycle Waveform Generation
      • Pulsed Cyclic Waveform Generation
      • Waveform Generation Programming Functions
        • Clearing the Analog Output Circuitry
        • Selecting the Internal Update Counter
      • Programming the Update-Interval Counter
      • Programming the Waveform Cycle Counter
      • Programming the Waveform Cycle Interval Counter
        • Servicing Update Requests
    • Programming the Digital I/O Circuitry
    • Programming the Am9513A Counter/Timer
    • RTSI Bus Trigger Line Programming Considerations
    • RTSI Switch Signal Connection Considerations
    • Programming the RTSI Switch
      • Programming DMA Operations
      • Interrupt Programming
  • Chapter 6 Calibration Procedures
    • Calibration Equipment Requirements
    • Calibration DACs
    • Reference Calibration
    • Analog Input Calibration
    • Analog Output Calibration
  • Appendix A Specifications
  • Appendix B I/O Connector
  • Appendix C AMD Am9513A Data Sheet
  • Appendix D Customer Communication
  • Glossary
  • Index
  • Figures
    • Figure 1-1. The Relationship between the Programmi...
    • Figure 2-1. AT-MIO-16X with 50-Pin I/O Connector P...
    • Figure 2-2. AT-MIO-16X with 68-Pin I/O Connector P...
    • Figure 2-3. Example Base I/O Address Switch Settin...
    • Figure 2-4. AT-MIO-16X 50-Pin I/O Connector
    • Figure 2-5. AT-MIO-16X 68-Pin I/O Connector
    • Figure 2-6. AT-MIO-16X PGIA
    • Figure 2-7. Differential Input Connections for Gro...
    • Figure 2-8. Differential Input Connections for Non...
    • Figure 2-9. Single-Ended Input Connections for Non...
    • Figure 2-10. Single-Ended Input Connections for Gr...
    • Figure 2-11. Analog Output Connections
    • Figure 2-12. Digital I/O Connections
    • Figure 2-13. EXTSTROBE* Signal Timing
    • Figure 2-14. EXTCONV* Signal Timing
    • Figure 2-15. EXTTRIG* Signal Timing
    • Figure 2-16. EXTTMRTRIG* Signal Timing
    • Figure 2-17. Event-Counting Application with Exter...
    • Figure 2-18. Frequency Measurement Application
    • Figure 2-19. General-Purpose Timing Signals
    • Figure 3-1. AT-MIO-16X Block Diagram
    • Figure 3-2. PC I/O Channel Interface Circuitry Blo...
    • Figure 3-3. Analog Input and Data Acquisition Circ...
    • Figure 3-4. ADC Conversion Timing
    • Figure 3-5. Single-Channel Posttrigger Data Acquis...
    • Figure 3-6. Single-Channel Pretrigger Data Acquisi...
    • Figure 3-7. Scanning Posttrigger Data Acquisition ...
    • Figure 3-8. Interval Scanning Posttrigger Data Acq...
    • Figure 3-9. Analog Output Circuitry Block Diagram
    • Figure 3-10. Analog Output Waveform Circuitry
    • Figure 3-11. Posted DAC Update Timing
    • Figure 3-12. Analog Output Waveform Circuitry
    • Figure 3-13. FIFO Cyclic Waveform Generation with ...
    • Figure 3-14. FIFO Programmed Cyclic Waveform Timin...
    • Figure 3-15. FIFO Pulsed Waveform Generation Timin...
    • Figure 3-16. Digital I/O Circuitry Block Diagram
    • Figure 3-17. Timing I/O Circuitry Block Diagram
    • Figure 3-18. Counter Block Diagram
    • Figure 3-19. RTSI Bus Interface Circuitry Block Di...
    • Figure 5-1. Initializing the Am9513A Counter/Timer...
    • Figure 5-2. Single Conversion Programming
    • Figure 5-3. Single-Channel Data Acquisition Progra...
    • Figure 5-4. Scanning Data Acquisition Programming
    • Figure 5-5. Interval Scanning Data Acquisition Pro...
    • Figure 5-6. Resetting an Am9513A Counter/Timer
    • Figure 5-7. Cyclic Waveform Programming
    • Figure 5-8. Programmed Cycle Waveform Programming
    • Figure 5-9. Pulsed Cyclic Waveform Programming
    • Figure 5-10. RTSI Switch Control Pattern
    • Figure 6-1. AT-MIO-16X EEPROM Map
    • Figure 6-2. Revision and Subrevision Field
    • Figure 6-3. Configuration Memory Depth Field
    • Figure 6-4. ADC and DAC FIFO Depth Field
    • Figure 6-5. Area Information Field
    • Figure B-1. AT-MIO-16X 50-Pin I/O Connector
    • Figure B-2. AT-MIO-16X 68-Pin I/O Connector
  • Tables
    • Table 2-1. Default Settings of National Instrument...
    • Table 2-2. Switch Settings with Corresponding Base...
    • Table 2-3. Available Input Configurations for the ...
    • Table 2-4. Actual Range and Measurement Precision ...
    • Table 2-5. Recommended Input Configurations for Gr...
    • Table 4-1. AT-MIO-16X Register Map
    • Table 4-2. DMA Channel Selection
    • Table 4-3. DMA and Interrupt Modes
    • Table 4-4. Interrupt Level Selection
    • Table 4-5. Board and RTSI Clock Selection
    • Table 4-6. Analog Output Waveform Modes
    • Table 4-7. Straight Binary Mode A/D Conversion Val...
    • Table 4-8. Two’s Complement Mode A/D Conversion Va...
    • Table 4-9. Input Configuration
    • Table 4-10. Analog Output Voltage Versus Digital C...
    • Table 4-11. Analog Output Voltage Versus Digital C...
    • Table 5-1. Am9513A Counter/Timer Allocations
    • Table 5-2. RTSI Switch Signal Connections
    • Table 6-1. EEPROM Factory Area Information
    • Table 6-2. Calibration DACs
    • Table A-1. Equivalent Offset Errors in 16-Bit Syst...
    • Table A-2. Equivalent Gain Errors in 16-Bit System...
    • Table A-3. Typical Multiple-Channel Scanning Settl...
    • Table B-1. Signal Connection Descriptions