Creating a design, Creating a design from a netlist file, Creating a – National Instruments Graphical User Interface Ultiboard User Manual

Page 67: Design, Sections

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Chapter 2

Beginning a Design

NI Ultiboard User Manual

2-2

ni.com

Creating a Design

A design is created automatically when you create a project file. You can
also create a design and assign it to an existing project file. Remember that
a design must always be associated with a project.

Complete the following steps to create a design file:

1.

Choose File»Open and open the project to which the design is to be
added.

2.

Choose File»New Design. The New Design dialog box appears.

3.

Type the design name in the Design Name field.

4.

From the Design Type drop-down list, select PCB Design. Refer to the

Using Mechanical CAD

section of Chapter 10,

Using Mechanical

CAD

, for more information on the Mechanical CAD Design file type.

5.

Choose which of the open projects is to contain the design. The Add
to project
drop-down list shows only the open projects.

6.

Click OK. The New Design dialog box disappears, and a blank design
with the name that you specified is opened. The Projects

tab shows

that the new design is a part of the project file that you specified.

Creating a Design from a Netlist File

You can create a design based on a netlist file. A netlist contains
information about a given board's nets (the electrical connections between
pins) and parts. Multisim generates a

.EWNET

file which has all the details

required to import the schematic into Ultiboard.

Note

If PCB constraints are set in the Multisim file, they will also be included in the netlist

file. The file also contains Trace Width Analysis results if you checked the Set Node
Trace Widths Using the Results from This Analysis
check box when doing the analysis
in Multisim.

The following is an example of net information from a netlist file. A value
of

-1.000000000000

indicates that the Ultiboard default value will be

used for that parameter when the file is imported into Ultiboard.

(nets

(net "VCC"

(trackwidth "-1.000000000000")

(trackwidth_max "-1.000000000000")

(trackwidth_min "-1.000000000000")

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