Rainbow Electronics ATmega128L - Manual (Page 129)

129
ATmega128(L)
2467B–09/01
Note: A special case occurs when OCRnA/OCRnB/OC Rn C equals TOP and
COMnA1/COMnB1//COMnC1 is set. See “Phase Correct PWM Mode” on page 121. for
more details.
• Bit 1:0 - WGMn1:0: Waveform Generation Mode
Combined with the WGMn3:2 bits found in the TCCRnB register, these bits control the
counting sequence of the counter, the source for maximum (TOP) counter value, and
what type of waveform generation to be used, see
Table 61. Modes of operation sup-
ported by the Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare
match (CTC) mode, and three types of Pulse Width Modulation (PWM) modes. (
See
“Modes of Operation” on page 117.)
Table 60. Compare Output Mode, Phase Correct and Phase and Frequency Correct
PWM
COMnA1/COMnB /
COMnC1
COMnA0/COMnB0/
COMnC0 Description
0 0 Normal port operation, OCnA/OCnB/OCnC
disconnected.
0 1 WGMn3=0: Normal port operation,
OCnA/OCnB/OCnC disconnected.
WGMn3=1: Toggle OCnA on compare
match, OCnB/OCnC reserved.
1 0 Clear OCnA/OCnB/OCnC on compare
match when up-counting. Set
OCnA/OCnB/OCnC on compare match
when downcounting.
1 1 Set OCnA/OCnB/OCnC on compare match
when up-counting. Clear
OCnA/OCnB/OCnC on compare match
when downcounting.