Atmega128(l) – Rainbow Electronics ATmega128L User Manual

Page 94

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94

ATmega128(L)

2467B–09/01

non-inverted and inverted PWM outputs. The small horizontal line marks on the TCNT0
slopes represent compare matches between OCR0 and TCNT0.

Figure 38. Fast PWM Mode, Timing Diagram

The Timer/Counter overflow flag (

TOV0

) is set each time the counter reaches Max If the

interrupt is enabled, the interrupt handler routine can be used for updating the compare
value.

In fast PWM mode, the compare unit allows generation of PWM waveforms on the OC0
pin. Setting the COM01:0 bits to 2 will produce a non-inverted PWM and an inverted
PWM output can be generated by setting the COM01:0 to 3 (See

Table 54 on page 99).

The actual OC0 value will only be visible on the port pin if the data direction for the port
pin is set as output. The PWM waveform is generated by setting (or clearing) the OC0
register at the compare match between OCR0 and TCNT0, and clearing (or setting) the
OC0 register at the timer clock cycle the counter is cleared (changes from MAX to
BOTTOM).

The PWM frequency for the output can be calculated by the following equation:

The N variable represents the prescale factor (1, 8, 32, 64, 128, 256, or 1024).

The extreme values for the OCR0 register represent special cases when generating a
PWM waveform output in the fast PWM mode. If the OCR0 is set equal to BOTTOM, the
output will be a narrow spike for each MAX+1 timer clock cycle. Setting the OCR0 equal
to MAX will result in a constantly high or low output (depending on the polarity of the out-
put set by the COM01:0 bits.)

A frequency (with 50% duty cycle) waveform output in fast PWM mode can be achieved
by setting OC0 to toggle its logical level on each compare match (COM01:0 = 1). The
waveform generated will have a maximum frequency of f

oc0

= f

clk_I/O

/2 when OCR0 is set

to zero. This feature is similar to the OC0 toggle in CTC mode, except the double buffer
feature of the output compare unit is enabled in the fast PWM mode.

TCNTn

OCRn Update
and
TOVn Interrupt Flag Set

1

Period

2

3

OCn

OCn

(COMn1:0 = 2)

(COMn1:0 = 3)

OCRn Interrupt Flag Set

4

5

6

7

f

OC nPW M

f

clk_I/O

N

256

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