Rainbow Electronics ATmega128L - Manual (Page 275)

275
ATmega128(L)
2467B–09/01
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that
are unprogrammed, will be read as one.
Preventing Flash Corruption During periods of low V
CC,
the Flash program can be corrupted because the supply volt-
age is too low for the CPU and the Flash to operate properly. These issues are the same
as for board level systems using the Flash, and the same design solutions should be
applied.
A Flash program corruption can be caused by two situations when the voltage is too low.
First, a regular write sequence to the Flash requires a minimum voltage to operate cor-
rectly. Secondly, the CPU itself can execute instructions incorrectly, if the supply voltage
for executing instructions is too low.
Flash corruption can easily be avoided by following these design recommendations (one
is sufficient):
1. If there is no need for a Boot Loader update in the system, program the Boot
Loader Lock bits to prevent any Boot Loader software updates.
2. Keep the AVR RESET active (low) during periods of insufficient power supply
voltage. This can be done by enabling the internal Brown-out Detector (BOD) if
the operating voltage matches the detection level. If not, an external low V
CC
Reset Protection circuit can be used. If a reset occurs while a write operation is
in progress, the write operation will be completed provided that the power supply
voltage is sufficient.
3. Keep the AVR core in Power-down Sleep Mode during periods of low V
CC
. This
will prevent the CPU from attempting to decode and execute instructions, effec-
tively protecting the SPMCR register and thus the Flash from unintentional
writes.
Programming Time for Flash
when Using SPM The calibrated RC oscillator is used to time Flash accesses. Table 112 shows the typical
programming time for Flash accesses from the CPU.
Simple Assembly Code
Example for a Boot Loader ;-the routine writes one page of data from RAM to Flash
; the first data location in RAM is pointed to by the Y pointer
; the first data location in Flash is pointed to by the Z pointer
;-error handling is not included
;-the routine must be placed inside the boot space
; (at least the Do_spm sub routine). Only code inside NRWW section can
; be read during self-programming (page erase and page write).
;-registers used: r0, r1, temp1 (r16), temp2 (r17), looplo (r24),
; loophi (r25), spmcrval (r20)
; storing and restoring of registers is not included in the routine
; register usage can be optimized at the expense of code size
;-It is assumed that either the interrupt table is moved to the Boot
; loader section or that the interrupts are disabled.
.equ PAGESIZEB = PAGESIZE*2 ;PAGESIZEB is page size in BYTES, not words
.org SMALLBOOTSTART
Write_page:
; page erase
ldi
spmcrval, (1<<PGERS) | (1<<SPMEN)
call Do_spm
; re-enable the RWW section
Table 112. SPM Programming Time.
Symbol Min Programming Time Max Programming Time
Flash write (page erase, page write,
and write lock bits by SPM)
3.7 ms 4.5 ms