User leds, switches, and push buttons, Expansion connectors, Xsga output – Digilent 6003-410-000P-KIT User Manual
Page 18: Ac97 audio codec, Cpu trace and debug port, Usb 2 programming interface
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XUP Virtex-II Pro Development System
UG069 (v1.0) March 8, 2005
Chapter 1: XUP Virtex-II Pro Development System
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User LEDs, Switches, and Push Buttons
A total of four LEDs are provided for user-defined purposes. When the FPGA drives a
logic 0, the corresponding LED turns on. A single four-position DIP switch and five push
buttons are provided for user input. If the DIP switch is up, closed, or on, or the push button
is pressed, a logic 0 is seen by the FPGA, otherwise a logic 1 is indicated.
Expansion Connectors
A total of 80 Virtex-II Pro I/O pins are brought out to four user-supplied 60-pin headers
and two 40-pin right angle connectors for user-defined use. The 60-pin headers are
designed to accept ribbon-cable connectors, with every second signal a ground for signal
integrity. Some of these signals are shared with the front-mounted right-angle connectors.
The front-mounted connectors support Digilent expansion modules. In addition, a high-
speed connector is provided to support Digilent high-speed expansion modules. This
connector provides 40 single-ended or differential I/O signals in addition to three clocks.
Consult the Digilent webs
for a list of expansion boards that are
compatible with the XUP Virtex-II Pro Development System.
XSGA Output
The XUP Virtex-II Pro Development System includes a video DAC and 15-pin high-
density D-sub connector to support XSGA output. The video DAC can operate with a pixel
clock of up to 180 MHz. This allows for a VESA-compatible output of 1280 x 1024 at 75 Hz
refresh and a maximum resolution of 1600 x 1200 at 70 Hz refresh.
AC97 Audio CODEC
An audio CODEC and stereo power amplifier are included on the XUP Virtex-II Pro
Development System to provide a high-quality audio path and provide all of the analog
functionality in a PC audio system. It features a full-duplex stereo ADC and DAC, with an
analog mixer, combining the line-level inputs, microphone input, and PCM data.
CPU Trace and Debug Port
The FPGA is equipped with a CPU debugging interface and a 16-pin header. This
connector can be used in conjunction with third party tools, the Xilinx Parallel Cable IV, or
the Xilinx Platform Cable USB to debug software as it runs on either PowerPC 405
processor core.
ChipScope Pro™ can also be used to perform real-time debug and verification of the FPGA
design. ChipScope Pro inserts logic analyzer, bus analyzer, and Virtual I/O low-profile
software cores into the FPGA design. These cores allow the designer to view all the internal
signals and nodes within the FPGA including the Processor Local Bus (PLB) or On-Chip
Peripheral Bus (OPB) supporting the PowerPC 405 cores. Signals are captured and brought
out through the embedded Platform Cable USB programming interface for analysis using
the ChipScope Pro Logic Analyzer tool.
USB 2 Programming Interface
The XUP Virtex-II Pro Development System includes an embedded USB 2.0
microcontroller capable of communications with either high-speed (480 Mb/s) or full-
speed (12 Mb/s) USB hosts. This interface is used for programming or configuring the
Virtex-II Pro FPGA in Boundary-Scan (IEEE 1149.1/IEEE 1532) mode. Target clock speeds
are selectable from 750 kHz to 24 MHz. The USB 2.0 microcontroller attaches to a desktop
or laptop PC with an off-the-shelf high-speed A-B USB cable.