Echelon I/O Model Reference for Smart Transceivers and Neuron Chips - Manual (Page 103)

I/O Model Reference 93
Neurowire Master Mode
In Neurowire master mode, pin IO8 is the clock (driven by the Smart
Transceiver), IO9 is the serial data output, and IO10 is the serial data input.
Serial data is clocked out on pin IO9 at the same time as data is clocked in from
pin IO10. Data is clocked by the rising edge of the clock signal by default. In
addition, one or more of the IO0 – IO7 pins can be used as a chip select, allowing
multiple Neurowire devices to be connected on a three-wire bus. The clock rate
can be specified as 1 kbps, 10 kbps, or 20 kbps for a Series 3100 device with an
input clock rate of 10 MHz, or as 16 kbps, 160 kbps, and 320 kbps for a Series
5000 device with a system clock rate of 80 MHz; these scale proportionally with
input clock.
DATA OUT
DATA IN
CLOCK
SELECT
CLOCK
END OF
io_in() OR io_out()
START OF
io_in() OR io_out()
INPUT SAMPLED
t
setup
t
hold
t
high
t
low
t
fin
t
cs_clock
t
clock_cs
t
ret
Figure 34. Neurowire Master Timing
Data In
Data Out
Clock
Timeout
Neurowire SLAVE Neurowire MASTER
Data In
Data Out
Clock
Select
IO10
IO9
IO8
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
IO10
IO9
IO8
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
IO11 IO11
Figure 33. Neurowire I/O