Echelon I/O Model Reference for Smart Transceivers and Neuron Chips - Manual (Page 12)

2 Introduction
Overview
Echelon’s Neuron Chips and Smart Transceivers connect to application-specific
external hardware through 11 or 12 I/O pins, named IO0-IO11. You can
configure these pins to provide flexible input and output (I/O) functions with
minimal external circuitry. These functions are described as I/O models .
The Neuron C programming language allows the application programmer to
declare I/O objects that use one or more I/O pins. An I/O object is a software
instance of an I/O model, and provides programmable access to an I/O driver for a
specified on-chip I/O hardware configuration and a specified input or output
waveform definition. Programs can then refer to most of these objects through
io_in() and io_out() system calls to perform the actual input or output function
during execution of the program. Because events are associated with changes in
input values, the task scheduler can execute associated application code when
these changes occur.
There are many different I/O models available for use with the Neuron Chips and
Smart Transceivers. Most I/O models are available in system images by default.
If an I/O model is required by an application, but is not included in the default
system image, the development tool links the appropriate models into available
memory space. For FT 3120, PL 3120, and PL 3170 Smart Transceiver designs,
this linkage means that internal EEPROM space must be used for the additional
model. For FT 3150 or PL 3150 Smart Transceiver designs, the model is added to
an external flash or EEPROM region beyond the 16 KB space reserved for the
system image. For Series 5000 device designs, the model is added to the
application image.
Series 5000 chips also support application-specific interrupts, which can trigger
on either or both edges, or on either level, for any of the I/O pins, regardless of
any associated I/O object. See the Neuron C Programmer’s Guide for more
information about interrupts.
Summary of the Available I/O Models
Many I/O models are available for Neuron Chips and Smart Transceivers.
Certain I/O models are available only for specific chip types, but most are
available to all Neuron Chips and Smart Transceivers. The I/O models are
grouped into the following categories:
• Direct I/O Models are based on a logic level at the I/O pins; none of the
Neuron Chip or Smart Transceiver hardware’s timer/counters are used in
conjunction with these I/O models. These models can be used in multiple,
overlapping combinations within the same Neuron Chip or Smart
Transceiver. Direct I/O models include the following types:
Input Model Types Output Model Types
bit bit
byte byte
leveldetect nibble
nibble touch
touch