Echelon I/O Model Reference for Smart Transceivers and Neuron Chips - Manual (Page 181)

I/O Model Reference 171
Example
IO_1 output pulsecount ioTrainOut;
when (...) {
// will produce 100 pulses on pin 1
// each pulse of period 6.554 milliseconds
io_out(ioTrainOut, 100);
}
Pulsewidth Output
For Series 3100 devices, the pulsewidth I/O model produces output pulses of a
specified period or duty cycle to create a repeating waveform whose duty cycle is
a function of output-value and whose period is a function of the clock period,
calculated as follows:
pulsewidth (ns) = output-value * 2000 * 2^(clock) / input_clock (MHz)
total_period (ns) = 256 * 2000 * 2^(clock) / input_clock (MHz)
where clock ranges from 0..7
For Series 5000 devices, the pulsewidth I/O model produces output pulses of a
specified period or duty cycle to create a repeating waveform whose duty cycle is
a function of
output-value and whose period is a function of the clock period,
calculated as follows:
pulsewidth (ns) = output-value * 2000 * 2^(value) / 10 MHz
total_period (ns) = 256 * 2000 * 2^(value) / 10 MHz
where value ranges from 0..15
You can use this I/O object to implement digital-to-analog (D/A) converters or to
control any device with a pulsewidth-modulated input.
This model applies to Series 3100 Neuron Chips and Smart Transceivers, and to
Series 5000 Neuron Processors and Smart Transceivers.
Hardware Considerations
A timer/counter can be configured to generate a pulsewidth modulated repeating
waveform. In pulsewidth short function, the duty cycle ranges from 0% to 100%
(0/256 to 255/256) of a cycle, in steps of about 0.4% (1/256). See
Timer/Counter
Square Wave Output on page 190 for the frequency of the waveform for various
clock values.
In pulsewidth long function, the duty cycle ranges from 0% to almost 100%
(0/65536 to 65535/65536) of a cycle in steps of 15.25 ppm (1/65536). See
Timer/Counter Pulsetrain Output on page 193 for the frequency of the waveform
for various clock values. The asserted state of the waveform can be either logic
high or logic low. Writing a new pulsewidth value to the device takes effect at
the end of the current cycle. A pulsewidth modulated signal provides a simple
means of digital-to-analog conversion (see Figure 64 on page 172).
The new output value does not take effect until the end of the current cycle, with
two exceptions: