Echelon I/O Model Reference for Smart Transceivers and Neuron Chips - Manual (Page 151)

I/O Model Reference 141
For an application running on a Series 5000 device, you can specify an
increased resolution for the timer base clock frequency by calling the
io_set_clock() function with a clock value in the range 0..15 (using one of the
TCCLK_* macros defined in <echelon.h>). This function overrides the
resolution value specified for clock() within the I/O object declaration.
See Appendix A, Timer/Counter Periods and Resolution , on page 187, for a
description of the timer resolution and maximum range for each specification
of the clock() value or each value of the TCCLK_* macros. See the
Neuron C
Reference Guide for information about the io_set_clock() function.
io-object-name
A user-specified name for the I/O object, in the ANSI C format for variable
identifiers.
Usage
unsigned long input-value ;
input-value = io_in( io-object-name );
Example
IO_4 input ontime ded clock(7) ioGateTime;
unsigned long pulseDuration;
when (io_update_occurs(ioGateTime)) {
pulseDuration = input_value;
// measures up to 1.677 seconds
}
Period Input
For Series 3100 devices, the period I/O model measures the total period, from
edge to edge, of an input signal in units of the clock period, calculated as follows:
period (ns) = ( return-value +n) * 2000 * 2^(clock) / input_clock (MHz)
where clock ranges from 0..7, and n = 1 for clock(0) or n = 0 otherwise. Also, the
value return-value is equivalent to the input-value shown in Usage on page 145.
For Series 5000 devices, the period I/O model measures the total period, from
edge to edge, of an input signal in units of the clock period, calculated as follows:
period (ns) = ( return-value +n) * 2000 * 2^(value) / 10 MHz
where value ranges from 0..15, and n = 1 for clock(0) or n = 0 otherwise. Also, the
value
return-value is equivalent to the input-value shown in Usage on page 145.
You can use this model to implement digital-to-analog (D/A) converters,
frequency counters, or tachometers.
This model applies to Series 3100 Neuron Chips and Smart Transceivers, and to
Series 5000 Neuron Processors and Smart Transceivers.