Figure 54: plb read access, Figure 55: plb write access – BECKHOFF EtherCAT IP Core for Xilinx FPGAs v2.04e User Manual

Figure 54: plb read access, Figure 55: plb write access | BECKHOFF EtherCAT IP Core for Xilinx FPGAs v2.04e User Manual | Page 115 / 126