BECKHOFF EtherCAT IP Core for Xilinx FPGAs v2.04e - Manual (Page 32)

Features and Registers
III-20 Slave Controller – IP Core for Xilinx FPGAs
Bit Description small medium large
44 Reserved 0 0 0
45 Reserved 0 0 0
46 Reserved 0 0 0
47 Reserved 0 0 0
48 Reserved 0 0 0
49 Reserved 0 0 0
50 ERR LED, RUN/ERR LED Override 0 0 0
others Reserved 0 0 0