3 µcontroller configuration (8/16bit), Figure 20: register pdi, Μc-configuration – BECKHOFF EtherCAT IP Core for Xilinx FPGAs v2.04e User Manual

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3 µcontroller configuration (8/16bit), Figure 20: register pdi, Μc-configuration | BECKHOFF EtherCAT IP Core for Xilinx FPGAs v2.04e User Manual | Page 53 / 126 3 µcontroller configuration (8/16bit), Figure 20: register pdi, Μc-configuration | BECKHOFF EtherCAT IP Core for Xilinx FPGAs v2.04e User Manual | Page 53 / 126
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