5 output enable, 6 syncmanager watchdog, Output enable – BECKHOFF EtherCAT IP Core for Xilinx FPGAs v2.04e User Manual

5 output enable, 6 syncmanager watchdog, Output enable | Syncmanager watchdog, Figure 35: digital output principle schematic | BECKHOFF EtherCAT IP Core for Xilinx FPGAs v2.04e User Manual | Page 90 / 126